INTRODUCTION

Reactive energy is mainly associated with the operation of electric devices such as transformers in power systems and motors in industrial applications [1]. Reactive energy is a bi-directional interchange between the load and the source in power systems causing power losses, reduction in the effective network capacity and deterioration of power quality [2]. Therefore, reactive energy must be compensated, minimizing its circulation in the power system. Many industrialized countries have implemented regulation that penalizes the excessive use of reactive consumption due to the over cost that it causes in distribution and transmission networks [3], [4].

An alternative to reactive power compensation is the use of capacitor banks. These are devices that are composed of switching capacitors, so compensation is made in a discrete way being useful in systems with variable loads. The continuous change in the topologies of the load and power network causes resonance problems when capacitor banks are installed, implying mal-functioning of the power network due to the presence of over voltages and currents [5]. These problems can be solved using controlled power electronic devices [6], [7], [8].

D-STATCOM is a promissory power electronic device to reactive power compensation. It is connected in parallel with the load and can operate in a continuous way, reaching a power factor near the unity and avoiding operative problems. The most common topologies for D-STATCOM are multi-pulse and multi-level [7], [9]. Multi-level topology has more than six switches, each branch has three or more switches depending on the voltage level, which requires complex control schemes and higher costs [10,11,12,13,14,15]. Meanwhile, multi-pulse topology has six switches [16], two switches by branch. This topology has the fewest switches for a three-phase inverter [7], [8], [17]. Due to its lower cost and simplicity of control, multi-pulse topology was chosen in this research.

This paper presents a description of the implementation of a D-STATCOM. Hardware implementation is illustrated, including design details in Printed Circuit Boards (PCB). PCB of sensors, power switching, passive elements, and processor are fully described. Also, the firmware that allows D-STATCOM operation is detailed and illustrated. Such firmware was implemented using a TMS3202F DSP (Texas Instruments) with a modular approach.

This paper is structured as follows: In Section II the fundaments of reactive power compensation and D-STATCOM operation are described; in Section III the D-STATCOM hardware development is presented; in Section IV the firmware modules are described; in section V results are presented showing the D-STATCOM operation; finally, the most relevant conclusions are presented in Section VI.

II. D-STATCOM OPERATION

Reactive power is an oscillating energy that bi-directionally flows between electrical grids and loads; however, many loads such as motors need reactive power in their operation; D-STATCOM can provide this reactive power improving energy quality of the power network. Fig. 1 illustrates reactive energy compensation provided by a D-STATCOM. In this case the grid, load and the D-STATCOM are in parallel, having the same voltage (grid voltage ); , , are grid, load and D-STATCOM currents respectively.

Using as the reference in the horizontal axis, phasor diagrams are presented for each element in Fig. 1. Current has a phase angle with respect to, thus it can be decomposed into a horizontal (direct) projection (associated to load active power ) and a vertical (quadrature) projection (associated with load reactive power ). During D-STATCOM operation, the quadrature component of is controlled in order to be equal to the quadrature component of with opposite sign. In this way, the grid current has no quadrature component and thus no reactive power is interchanged with the grid.

In Fig. 1, D-STATCOM apparent power is represented as the sum of an active power and a reactive power . Also corresponds to the power consumed by the D-STATCOM (including power losses) necessary for its operation. is used to compensate . Note that, grid apparent power ( is equal to plus i.e. the grid only provides active power when D-STATCOM is in operation.

III. HARDWARE DESCRIPTION

Fig. 2 shows the D-STATCOM scheme and complementary elements for its operation. Fig. 2a presents D-STATCOM converter topology (two levels and six pulses) [7], [9]; while Fig. 2b shows additional electronic modules in charge of measurement and converter control.

D-STATCOM main component is the three-phase inverter (Voltage Source Converter, VSC), in charge of power flow regulation between the AC grid and the DC-bus (Fig. 2b). Such inverter consists of six insulated gate bipolar transistors (IGBTs) and is controlled by means of six switching signals: , , for the upper transistors and , , for the lower transistors.

The DC-bus is composed of capacitors and that are used for energy storing and guarantee a constant DC voltage for three phase inverter operation. Two stabilization resistors, in parallel with each capacitor, are used to minimize capacitor voltage unbalances due to neutral currents [18]. Also, to limit start-up currents when the DC-bus is discharged, a pre-charge circuit was added between the inverter and bus [17]. The pre-charge circuit consists of a series resistor that is short-circuited once the DC-bus has reached a pre-set voltage.

Three-phase grid connection is achieved by using a set of coupling inductances (, and ). Coupling inductances function is to filter high frequency components of output D-STATCOM currents (, , ). Also, for safety and practical reasons, a series connection relays ( are used to D-STATCOM disconnection.

The following sensors were implemented. Current sensors were used to measure D-STATCOM output currents (, , that are indicated as the vector ) and load currents (, , that are indicated as the vector ). Voltage sensors measure DC-bus voltage () and three-phase grid voltages (). Sensor implementation and signal conditioning where implemented in the Current and Voltage Measurement PCBs (Fig. 2b.).

Sampling, calculations, control algorithms, control signal generation ( and ) and communications are carried out by a microcontroller. Microcontroller PCB (Fig. 2b.) contains all the associated necessary circuitry for the correct microcontroller operation.

Table I summarizes the main specifications for the developed D-STATCOM. The next subsections describe in more depth the implementation of the different hardware blocks.

A. PCB for VSC

Fig. 3 presents the PCB implemented for the VSC and gate drivers. This PCB has three main stages: 1) VSC implementation, 2) Bootstrap capacitor implementation and 3) optocouplers implementation.

First stage, VSC implementation: The VSC was built with an Integrated Power Hybrid IC with internal shunt Resistor (IRAM136-3063B). This module has six power switches (IGBT) with anti-parallel diodes. Maximum operation current is 15 Amp (100oC) while collector-emitter voltage is up to 600 Volts. Module includes gate-drivers for appropriated IGBT switching, allowing its control by means of 5V digital signals.

Second stage, Bootstrap capacitor implementation: Bootstrap capacitors are used to adequate the voltage signal for upper switches of VSC.

Third stage, optocouplers implementation: six optocouplers were used for isolation between the control system (microcontroller) and the VSC.

Finally, this PCB has a common connector for switching signals generated from the microcontroller (, ), terminals for bus DC connection and terminals for the VSC output.

To guarantee safety, durability and scalability, this PCB was designed taking into account the recommendations from IPC standard 2152 [19] for route sizing with respect to maximum current and IPC standard 2221 [20] and for clearance with respect to maximum voltage. These recommendations were also applied to the rest of PCBs developed.

B. Current and Voltage Measurement PCBs

Voltage measurement (, ) and current measurement (, ) were implemented in independent PCBs. Fig. 4 presents the voltage measurement PCB. This PCB is based on the AMC1200 isolation amplifier, allowing measurements up to 1000 Volts. AMC1200 is powered trough an isolated DC-DC power source. AMC1200 output is filtered through an active analog filter using the Sallen-Key topology. Analog signals from this PCB are in the range of 0 to 3.5V and are carried out to the microcontroller PCB through a common connector.

Voltage PCB can measure up to four different signals, thus a single card is enough for D-STATCOM requirements (, )

Fig. 5 presents the current measurement PCB. This PCB has three current inputs and is based on the ACS174 hall effect sensor. ACS174 provides an isolated voltage output proportional to the sensed current, in the range of 0-5V. Signal conditioning is completed by a Sallen-Key filtering and attenuation to 0-3.5V range. Two PCBs are used, first for D-STATCOM currents measurement () and second for load currents measurement ().

C. Passive elements

DC-Bus and coupling inductors define limits for D-STATCOM compensation. In this subsection their sizing is detailed.

Coupling inductor sizing: inductor designing is done based on current signal geometry according to [21], [22]. Equation 1 presents the inductor value L, where is the current ripple, is the switching frequency and n is the number of inverter levels. In this way, the selected coupling inductance for each phase is (Fig. 6) in order to filter the current signal given by the IGBT module (grid coupling inductances in Fig. 2).

DC bus sizing: capacitance value is defined by means of Equation 2 from [21], [23]. Where is the output voltage peak, is the neutral current peak, is the grid frequency and is the voltage ripple. In this case, D-STATCOM has 4 capacitors (split DC-Bus) of (commercial value). In addition, 2 resistances of 30 kΩ are used to regulate the DC-Bus charge (pre-charge circuit in Fig. 2).

D. Microcontroller

D-STATCOM is a power electronics device that needs data measurement, serial communication, PI (Proportional Integral) controller and high-speed processing. Therefore, a microcontroller with DSP is necessary. In this case, the D-STATCOM controller was developed using a microcontroller TMS320F28335 (specialized in power electronics [24], [25]). Fig. 7 presents the PCB designed and implemented for the microcontroller. This PCB has 4 main stages:

First stage, microcontroller: this is a microcontroller DSP TMS320F28335 manufacturer by Texas Instruments. TMS320F family is focus on power electronics applications.

Second stage, common PWM terminals: these terminals are used to control the VSC.

Third stage, common measurement terminals: these terminals are used to receive measures from sensor PCBs.

Fourth stage, Serial Communication: these terminals are used to do an interface between microcontroller and users by means of USB port (SCI-USB).

IV. FIRMWARE DESCRIPTION

This section describes the firmware that was implemented in the DSP TMS320F28335. TMS320F family manufacturer (Texas Instruments) provides specialized libraries in motor control [26] , frequency analysis response [27] and photo-voltaic solar energy [28] . Also, the supplier provides detailed libraries with explanation of microcontroller peripheral programing for controlling power switches [29] .

Math operations in a control system imply complex processing operations, which must be executed in a period of time shorter than the sampling period of the system. For this reason, it is convenient to use a microcontroller with floating-point (programmed for DSP) and fixed-point libraries in order to execute faster numeric calculations.

The DSP has an Arithmetic Logic Unit (ALU) module that is used to support the processor with complex math operations. Fixed-point libraries are codes to perform high speed math operations. Table II shows some functions for math operations of TMS320F family.

Fig. 8 shows the main functions that TMS320F28335 executes for D-STATCOM operation. Voltages and currents digitalization is accomplished by using the ADC (Analog to Digital Converter) peripheral. Activation of the VSC IGBTS is accomplished using the PWM (Pulse Width Modulation) peripheral [30] . SCI (Serial Communications Interface) peripheral is used for communications while GPIO (General Purpose Input Output) peripheral is used for contactors activation (grid connection and pre-charge circuit).

In order to control the microcontroller peripherals, a set of firmware modules were developed. These modules are shown in Fig. 9 and are described in the next subsections.

A. Analog to digital conversion and data conditioning

Control process initiates by measuring all voltage and current signals of the system (, , , ). TMS320F ADC was used. ADC resolution is 12 bits and sampling frequency is 20 kHz. Data conditioning consists of ADC data scaling, that permits to convert binary data to engineering units through an offset correction and a gain factor.

B. Phase-Locked Loop (PLL)

A phase-locked is a control system which permits the generation of signal whose output is related to the phase of an input signal. For power electronic devices, PLL is used to synchronize the voltages and currents of the system with a reference. In this case, the signal which is the reference of the system is the grid voltage of phase a (). PLL was implemented using the library C28x Solar library [20], PLL algorithm is updated at every ADC sampling.

C. Clarke-Park transform

Clarke-Park transform changes three-phase AC signals into DC signals referenced to a rotational frame (dq0 frame) [31], [32]. It allows the representation of all phase currents in its direct and quadrature components using as reference the voltage . This transform gives information about active power related to the direct current component and also reactive power related to the quadrature current component. Clarke-Park transform is performed by a sequence of instantaneous matrix operations that is performed at the same ADC sampling frequency. This transform comes from solar library [28] and uses the voltage and current data sampled from ADC and the phase angle determined by PLL. Using this transformation, D-STATCOM currents in dq0 frame () are obtained from , and load currents in dq0 frame () are obtained from .

D. D-STATCOM Controllers

D-STATCOM controllers generate control signals for IGBT power module. Cascade control and closed loop control are used to compensate reactive power. Fig. 10 shows the D-STATCOM control schemes: Fig. 10a presents the DC voltage control loop and Fig. 10b presents reactive current control loop.

DC voltage is controlled by absorbing or delivering active power from the grid (Fig. 10a). The input to the controller is the error signal between the set point ( and sensed , and its output is the direct current component set point (). In this way, controller determines the amount of (that is related to active power) required to keep at its desired level. Direct current controller ( function is to keep the value fixed at the level by modifying the direct modulation output that defines IGBT switching. Blocks and represent the transfer functions for the D-STATCOM model [18].

Fig. 10b presents the reactive currents of the control loop. Note that, in this case, a voltage controller is not necessary. This is due to the oscillating nature of the reactive power, which does not affect the average value but affects its ripple. The set point for the closed loop controller ( is the negative value of the load quadrature current . In this way, this controller guarantees that the D-STATCOM system behaves as a controlled current source; that is, always equal to the reactive current of the load. The output from this controller is the quadrature modulation that defines the IGBT switching.

All controllers use PI (proportional integrative) control law and were implemented using Texas instruments libraries and tuned using the methods described in [17]. Sampling rate for current controllers (, ) is 4KHz, and for DC voltage controller () is 800Hz.

E. Inverse Clarke-Park transformation

Controller outputs and are related to dq0 frame. must be converted to time domain using inverse Clarke-Park transformation. Inverse Clarke-Park transformation provides three sinusoidal signals with a difference of 120° between phases which will be used as reference in the SPWM (Sinusoidal Pulse Width Modulation). For inverse transformation, it is assumed that , implying that the D-STATCOM output currents are balanced.

F. SPWM modulation

SPWM generates switching signals for the IGBT modules that are based on the results obtained from the inverse Clarke-Park transformation. SPWM modulation is carried out by using the microcontroller enhanced Pulse Width Modulation (ePWM) peripheral.

Fig. 11 shows a bipolar modulation for an arbitrary phase. Modulation consists in the comparison between a sinusoidal signal (reference signal) and a triangular signal (carrier signal). In this implementation, the reference signal is while the triangular signal is generated by a digital counter in the ePWM peripheral.

Reference and Carrier signals are continuously compared. Every time that the reference signal is higher than the carrier signal, the upper IGBT is activated and the lower IGBT is deactivated. Instead, when reference signal is lower than carrier signal, the upper IGBT for that phase is deactivated and the lower IGBT is activated. Note that this process is executed for the three phases, providing the six switching signals of Fig. 2a ( for upper IGBT and for lower IGBT).

Also, ePWM peripheral provides dead time functionalities, which avoid VSC destruction due to simultaneous activation of upper and lower IGBTs of the same phase.

G. Initialization routine

After a power on condition, and before system operation, a series of initialization steps must be carried on in order to guarantee a proper initial condition for controllers and a safe start operation.

Fig. 12 shows the algorithm for D-STATCOM initialization: 1) Initial conditions: Initially, grid connection contactor is opened while microcontroller initializes all its peripherals. 2) DC bus discharge: Microcontroller verifies that the DC bus is discharged before initiating operation. 3) Delay for DC level measurement: During a given period, measurements of all sensors (current and voltage) are captured for offset compensation. 4) Grid connection: Grid contactor is closed. 5) Capacitor pre-charging routine: DC voltage starts to increase, but DC-bus current is limited by the two pre-charging resistors, once voltage reaches a given threshold, pre-charging resistors are short-circuited using pre-charging contactors. 6) Controllers initialization: Control loop described in previous sections is started.

H. Serial communications

This firmware module controls the SCI peripheral which using a FTDI232 interface provides USB communication for the D-STATCOM. This module consists of a finite state machine that receives request of information from user and responds sending data.

Part of the microcontroller’s memory is reserved for saving data of load currents (), D-STATCOM current (), grid voltage (), dq0 transformations (, ), control variables (). Memory contents are serially transferred under user request. This mechanism helps to diagnose the system operation and was used to obtain some of the results for the next section.

V. RESULTS

In this section, the main results obtained from the D-STACOM prototype are presented. Subsections present results for selected individual modules and finally the D-STATCOM operation is shown.

Fig. 13 shows the implemented D-STATCOM and its main components: 1) Coupling contactor for grid connection, breakers and fuses for protection of PCBs and voltage sources. 2) Voltage measurement PCB. 3) microcontroller PCB. 4) Current measurement PCB. 5) Pre-charge contactor. 6) Pre-charge resistances. 7) PCB of VSC IRAM136-3063B. 8) Relays for actioning contactors. 9) DC bus capacitors. 10) Inductors for grid coupling.

A. Sensors, Analog to digital conversion and data conditiong

In this section, a validation of the measurement systems is shown. Table III presents the measured voltage by means of a scope GW INSTEK GDS-2240A and with the sensor voltage PCB. Fig. 14 presents a plot and linear regression of data from Table III; it is shown the linearity of sensor for voltage measurement with a ; this property allows the sensor calibration using any calibration device.

he same procedure was applied to all current and voltage sensors, providing reliable measurements. Fig. 15 shows a sinusoidal signal from the electrical grid that is captured by the ADC and its respective binary vector.

B. Phased locked loop (PLL)

Fig. 16 shows the PLL algorithm behavior (PLL algorithm following the grid signal). In this figure, the red sinusoidal signal corresponds to the grid voltage that is measured trough sensor PCB, sampled by ADC and entered to PLL algorithm. The blue signal is a digital signal generated by the microcontroller. It is programed to change state every time that the PLL algorithm predicts a zero cross of the grid signal. The PLL works correctly when the square signal changes its state with sinusoidal signal zero crossing. Fig. 15 presents three stages: 1) microcontroller off, blue signal is off; 2) microcontroller turns on and PLL start to search for grid synchronization; and 3) PLL is synchronized with the grid.

C. Clarke-Park transform

Fig. 17 shows the Clarke-Park transform done by the TMS320F28335 microcontroller. Fig. 17a shows the time domain of the three-phase D-STATCOM currents in open loop without load; currents () are shown in solid blue () orange () and green () colors, also grid phase () voltage of phase A is shown in dotted black (only for the reference phase). In figure 17a, is leading to , it means that D-STATCOM has a capacitor behavior (it provides reactive power).

Fig. 17b shows dq0 transformation of current signals using the algorithm described in previous sections. The blue signal represents current direct component () associated to the D-STATCOM active power, the orange signal represents current quadrature component () associated to positive reactive power and finally, the green signal represents zero component () associated with unbalances between phases.

Note that the time domain signals exhibit unbalances due to load imperfections. This explains the presence of component in its dq0 transformation.

D. SPWM modulation

Fig. 18 shows microcontroller SPWM modulation at minimum and maximum values of reference signal.

Reference signal is shown in green and SPWM modulation is shown in red. Note that when the reference signal is at its minimum, the modulation signal is at low level most of the time (i.e. lower IGBT activated). Instead, when the reference signal is at its maximum, the modulation signal is at its maximum value (i.e. upper IGBT activated) most of the time.

E. D-STATCOM operation

In this subsection, operation of D-STATCOM as a complete system is evaluated. Inductive and capacitive loads where connected to the grid and D-STATCOM capacity to compensate reactive power was observed.

Fig. 19 shows the D-STATCOM behavior operating as a capacitor taken from oscilloscope. In Fig. 19a, it is observed that currents (4.43 Arms) from phases A (upper graphic), B (middle graphic) and C (low graphic) are leading respect to grid voltage (44 Vrms). A phasor diagram is presented in Fig.19b; this figure shows a D-STATCOM angle of 81.63° (close to 90° due to active power losses) with respect to grid voltage. Fig. 19c presents the harmonics from current signal of phase A, where the THD is lower than 5%.

First, a resistive-inductive load was tested. Fig. 20 shows grid current signals in time domain before and after D-STATCOM operation, phase current A is blue, B is red and C is green, also each plot reproduces in gray the respective grid phase voltage in order to have phase references. Note that Fig 20 plots are divided in two parts: the left side shows grid currents without D-STATCOM operation and the right side with D-STATCOM operation. The transient condition due to STATCOM start is omitted, showing only steady state.

It can be seen that after D-STATCOM operation, the grid currents and voltages appear to be on phase. This can be verified in the phasor diagrams shown in Fig. 20a and Fig. 20b. Before operation, the grid current has a -33.02º angle against voltage, after starting the operation of the D-STATCOM, the angle was reduced to 5.11º. Considering power factor, this corresponds to a correction from 0.83 to 0.99. Note also that the grid current magnitude was decreased.

Fig. 21 presents the operation results when the D-STATCOM compensates a capacitive load. Such load is nonlinear, demanding reactive power and injecting harmonics to the electrical grid. Fig. 21a shows measurements before D-STATCOM operation. In this state, load has a power factor of 0.049 and the phasor diagram shows a load current of 2.04 Amp in quadrature with , i.e. load mainly demands reactive energy. Fig.21b shows measurements after D-STATCOM operation. Power factor is increased up to 0.99 remaining only the harmonic distortion caused by the load. In consequence, the current demanded from the electrical grid decreased up to 0.49 Amp.

VI. CONCLUSIONS

In this paper, a description of hardware and firmware development for a D-STATCOM was presented; D-STATCOM main function is reactive power compensation. The implemented prototype includes voltage and current measurement, signal processing, control algorithms, switching and associated hardware. Most relevant prototype parts were described and its functionality was verified.

The D-STATCOM operation results showed power factor correction, reduction in current demanded to electrical grid and correct behavior of control system, algorithms and hardware.

The D-STATCOM prototype demonstrated that it is technically possible to replace traditional reactive power compensation techniques (as capacitive banks) in distribution networks. It also allows a precise control of the reactive power; furthermore, digital electronics devices can be remotely monitored, enhancing diagnostics and maintenance.

This prototype becomes a research platform for testing different control schemes, and even implementation of harmonics and unbalances compensation. Also, due to its modular conception, the D-STATCOM can be used in AC systems and power electronics practical teaching.

Agradecimientos

The authors gratefully acknowledge the financial support provided by the Colombia Scientific Program within the framework of the call Ecosistema Científico (Contract No. FP44842- 218-2018). Likewise, Universidad de Antioquia (Colombia) is acknowledged for the financial support through the "Sostenibilidad" program.

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Author notes